Correction on my previous blog and some interesting implications …

Andrey Mokhov spotted that to satisfy the actual inverse Pythagorean we need to have alpha=1/2 rather than 2. That’s right. Indeed, what happens is that if we have alpha = 1/2 we would have (1/a)^2=(1/a1)^2+(1/a2)^2. This is what the inverse Pythagorean requires. In that case, for instance if a1=a2=2, then a must be sqrt(2). So the ratio between the individual decay a1=a2 and the collective decay is sqrt(2). For our stack decay under alpha = 2, we would have for a1=a2=2, a=1/2, so the ratio between individual decay and collective decay is 4.

It’s actually quite interesting to look at these relations a bit deeper, and see how the “Pythagorean” (geometric) relationship evolves as we change alpha from something like alpha<=1/2 to alpha>=2.

If we take alpha going to 2 and above, we have the effect of much slower collective decay than 4x compared to the individual decay. Physically this corresponds to the situation when the delay of an inverter in the ring becomes strongly inversely proportional to voltage. Geometrically, this is like contracting the height of the triangle in which sides go further apart than 90 degrees – say the triangle is isosceles for simplicity, and say its angle is say 100 degrees.

The case of alpha = 1/2 corresponds to the case where delay is proportional to the square root of Voltage, and here the stack makes the decay rate to follow the inverse Pythagorean! So this is the case of a triangle with sides being at 90 degrees.

But if alpha goes below 1/2, we have the  effect of the collective decay being closer to individual decays, and geometrically the height of the triangle where sides close up to less than 90 degrees!

Incidentally, Andrey Mokhov suggested we may consider a different physical interpretation for inverse Pythagorean. Instead of looking at lengths a, b and h, one can consider volumes Va, Vb and Vh of 4-D cubes with such side lengths. Then these volumes would relate exactly as in our case of alpha=2, i.e. 1/sqrt (Vh)=1/sqrt(Va)+1/sqrt(Vb).


Charge decay in a stack of two digital circuits follows inverse Pythagorean Law!

My last blog about my talk at HDT 2019 on Stacking Asynchronous Circuits contained a link to my slides. I recommend you having a particular look at slide #21. It talks about an interesting fact that a series (stack) discharge rate follows the law of the inverse Pythagorean!

It looks like mother nature caters for a geometric law of the most economic common between two individual sides.

My Talk on Stacked Asynchronous Circuits at HDT 2019

I just attended a Second Workshop on Hardware Design Theory, held in Budapest, collocated with 33rd International Symposium on Distributed Computing

The HDT’19 workshop was organised by Moti Medina and Andrey Mokhov. It had a number of invited talks, and here is the programme:

I gave a talk on Stacked Asynchronous circuits.

Here is the abstract: In this talk we will look at digital circuits from the viewpoint of electrical circuit theory, i.e. as loads to power sources. Such circuits, especially when they are asynchronous can be seen as voltage controlled oscillators. Their switching behaviour, including their operating frequency is modulated by the supply voltage. Interestingly, in the reverse direction if they are driven by external event sources, their switching frequency determines their inherent impedance which itself makes them ideal potentiometers or voltage dividers. Such circuits can be stacked like non-linear resistors in series and parallel, and lend themselves to interesting theoretical and practical results, such as RC circuits with hyperbolic capacitor discharges and designs of dynamic frequency mirrors.

Here is the PDF of my slides:

Towards computing on energy current

My further discourse with Ed and Ivor last night has resulted in the following message from Ed.



your yesterday message to Ivor makes me consider once again the mathematical equations Ivor introduces in his paper “The Heaviside Signal”. I concentrate on the equation c(dE/dx) = dE/dt in Appendix 1 (ignoring the ” – ” on the right side). This formula is constructed by interpreting the propagation of a voltage step in space (first diagram) and in time (second diagram) as a velocity v of motion in the direction of time, v = dx/dt, that is, a vector quantity. In the diagrams, this velocity v is symbolized by the letter c. With dx/dt = v the equation c(dE/dx) = dE/dt results in c = dx/dt = v. This asserted equality of c and v then insinuates that the voltage step would really “travel” in space and time with a vector velocity v = c in the direction of time. As I see things, the equation v = c is mistaken, since v is a vector quantity, which c is not. c is a scalar, as is proven by the Poynting vector E when put over p, resulting in c: E/p = c. Vector E over vector p = mv; v is a vector, c is a scalar quantity. Q.e.d. So c does not symbolize some velocity of some motion in the direction of time. What else does this factor mean, as it is  undoubtedly a quotient of a quantity of space, L, over a quantity of time, T, c [L/T] ? If you draw a diagram of Cartesian coordinates, space L in the vertical axis, time T in the horizontal, and you put the elements of space, L, over the elements of time, T, you get the constant quotient [L/T] to characterize the diagram as its parameter, or “grating constant”. Evidently this constant is not a vector, but a scalar. This shows that not every quotient dx/dt [L/T] represents a velocity of propagation in time, as the vector v does it. Rather it may be the case that such a quotient, the more if it is a constant (!), just represents the parameter of the space-time frame of reference wherein an observed phenomenon like the above-mentioned voltage step takes place. And this takes us into the middle of our finding that Poynting’s energy vector E = pxc differs from the classical scalar energy E = mv^2/2. This difference, as we can see now, is a consequence of not distinguishing between velocity v (vector, and variale), and the scalar constant c. Do you agree?


To which I have replied the following:


I am afraid I disagree with your conclusion that c coming out of the analysis of c(dE/dx) = dE/dt in Appendix 1  is a vector!

You raise a metaphysical story around it I am afraid.

This c is a constant coefficient. c is not a vector – its scalar.We have vectors around it dE/dt and dE/dx. These are vectors – one is force (or power in modern terms) and the other is momentum (as we agreed with you before). 

Full stop here!

Then, we should acknowledge the fact that there is a physical element behind this c – and this is energy current, which emanates in the universe from its Big Bang!

This is the carrier of interactions in Nature. This wasn’t known to Artistotle, Galileo, Newton, Maxwell … Ivor was and is the first to give this carrier the appropriate place.

If you had known a bit of the physics of communication (I recommend you to read Hans Schantz papers and book for that) you’d realise that its completely natural for communication (or interaction for that matter) to have a carrier – and this carrier for ExH does not need massed matter – it can perfectly well live in vaccuum.

That’s my take on this. You played an important role in this discourse. We have identified what momentum is in Catt’s theory and Heaviside Signal. Eureka!

What I have also discovered thanks to Ivor is the potential way for future computing – which is based NOT on envelope characteristics – such as exponentials and sines, but on discretised steps – this can potentially give way to improving the speed of computations by 2-3 orders of magnitude – we just need appropriate devices to support this speed and react to changes transmitted in energy current. I am already working on this!!!



Ultra-ultra-wide-band Electro-Magnetic computing

I envisage a ‘mothball computer’ – a capsule with the case whose outer surface harvests power from the environment and inside the capsule we have the computational electronics.

High-speed clocking can be provided by EM of highest possible frequency – e.g. by visible light, X-rays or ultimately by gamma rays!

Power supply for modulation electronics can be generated by solar cells – Perovskite cells. Because Perovskite cell have lead in them they can insulate gamma rays from propagation outside the compute capsule.

Information will be in the form of time-modulated super-HF signals.

We will represent information in terms of time-averaged pulse bursts.

We will have a ‘continuum’ range of temporal compute which will operate in the range between deterministic one-shot pulse burst (discrete) through deterministic multi-pulse analog averaged signal to stochastic multi-pulse averaged signal (cf. book by Mars & Poppelbaum –

Temporal Computing ( is the right kind of business opportunity for this Odyssey!

Talking at the AI Workshop held at the Center for AI Research (CAIR) at University of Agder, Norway

I was invited to University of Agder, in the South of Norway (in a nice town called Grimstad, famous for the presence of Henrik Ibsen and Knut Hamsun), to present my vision on what kind of hardware do we need for pervasive AI. This presentation was part of a workshop organised by Prof Ole-Christoffer Granmo, Director of CAIR, on the occasion of the grant opening of CAIR –

In my presentation I emphasized the following points:

  • Pervasive Intelligence requires reconsidering many balances:
    – Between software and hardware
    – Between power and compute
    – Between analogand digital
    – Between design and fabrication and maintenance
  • Granulation phenomenon: Granularity of power, time, data and function
  • Main research questions:
    – Can we granulate intelligence to minimum?
    – What is the smallest level at which we can make cyber-systems learn in terms of power, time, data and function?
  • Grand challenge for pervasive hardware AI:
    To enable electronic components with an ability to learn and compute in real-life environments with real-power and in real-time
  • Research Hypothesis:
    We should design systems that are energy-modulated and self-timed, with maximally distributed learning capabilities

I put a strong hypothesis on the role of using Tsetlin Automata (Automata with Linear Tactics) for building electronics with high-granularity learning capabilities.

The key elements of the proposed approach are:

  • Event-driven, robust to power and timing fluctuations
  • Decentralised TsetlinAutomata (TAs) for learning on demand
  • Mixed digital-analogcompute where elements are enabled and controlled by individual TAs
  • Natural approximation in its nature, both in learning and compute
  • Asynchronous logic for h/w implementation

The full set of my slides is here:

My Talk at the RAEng Fellows Day at Newcastle

I was invited to give a talk on my Research at the Royal Academy of Engineering event, held in Newcastle on the 28th January 2019.

The title of the talk is “Asynchronous Design Research or Building Little Clockless Universes

The PDF of the slides of my talk are here:

I only had 15 minutes give to me. Not a lot to talk about the 40 years of research life. So, at some point in preparing for this talk, I decided that I’ll try to explain what the research in microelectronic systems design is about, and in particular how my research in asynchronous design helps it.

Basically, I tried to emphasize on the role of ‘time control’ in designing ‘little universes’, where the time span covered by our knowledge of what’s is going on in those systems and why is between 1 few picoseconds (transistor switching event) and hours if not days (applications life times). So we cover around 10^18 events. How does it compare to the life of universe – being “only” around 10^13 years. Are we as powerful as gods in creating our ‘little universes’.

So, in my research I want to better control TIME at the smallest possible scale, surprisingly but, by going CLOCK-LESS! Clocking creates an illusory notion of determinacy in tracking events and their causal-relationship. Actually, it obscures such information. Instead by doing your circuit design in a disciplined way, such as speed-independent circuit design, you can control timing of events down to the best levels of granularity. In my research I achieved that level of granularity for TIME. It took me some 40 years!

But, furthermore, more recently, say in the last 10 years, I have managed to learn pretty well how to manage power and energy also to that smallest possible level, and actually make sure that energy consumption is known to the level of events controlled in a causal way. Energy/power-modulated computing, and its particular form of power-proportional computing, is the way for that. We can really keep track of where energy goes down to the level of a few femto-Joules. Indeed if a parasitic capacitance of an inverter output in modern CMOS technology is around 10fF and we switch it at Vdd=1V, we are talking about minimum energy quantity of CV^2=10fJ= 10^-14J per charging/discharging cycle (0-1-0 in terms of logic levels). Mobile phones run applications that can consume energy at the level of 10^4J. Again, like with time we seem to be pretty well informed about what’s going on in terms of energy covering 10^18 events! Probably, I’ll just need another 5 or so years to conquer determinacy in energy and power terms – our work on Real-Power Computing is in this direction.

Now, what’s next, you might ask? what other granularification, distribution and decentralization can we conquer in terms of building little universes!? The immediate guess that comes to my mind is the distribution (in time and energy directions) of functionality, and to be more precise intelligence. Can we create the granules of intelligence at the smallest possible scale, and cover same orders of magnitude. It is a hard task. Certainly, for CMOS technology it would be really difficult to imagine that we can force something like a small collection of transistors dynamically learn and optimize its functionality. But there are ways of going pretty close to that. One of them seems to be the direction of learning automata. Read about Tsetlin automata, for example ( , in the recent work of Ole-Christoffer Granmo.





Power-staggered computing

In the past people were trying to develop efficient algorithms for solving complex problems. The efficiency criteria would often be limited to performance, CPU time, or memory size. Today, CPU time or memory is not a problem. What is a problem is to fit your computational solution within bounds of energy resources and yet deliver suffcient quality.

This angle of attack started to rise on the horizon of computing about a decade or so ago when people began to put many CPU/GPU/FPGA and memory cores on a die.

Terms such as power/energy-proportional computing and energy-modulated (my term!) computing began to emerge to address this approach.

What we should look now more at is how to develop algorithms and architectures to compute that are not simply energy-efficient or speedy but that are aware of the information they process, the level and granularity of its importance or significance, as well as aware of the implementation technology underlying the compute architectures.

This is underpinned by the concept of approximate computing and it’s not in the sense of approximating the processed data – say by truncating the data words, but rather approximating the functions that process this data.

For example, instead of (or in addition to) trying to tweak an exact algorithm that works at O(n^3) to work at O(n^2*log2), we can find an approximate, i.e. inexact, algorithm that works at O(n), which could work hand-in-hand with the exact one, but … Those algorithms would be expected to play different roles. The one which is inexact would act as an assistant to the exact one. It would work as a whistle-blower to the latter one. It would give some classification results on the date, at a very low power cost, and then only wake up the exact one when necessary, i.e. when the significance of the processing should go up.

One can think about such power (and performance too!) staggered approach in various contexts.

One such example is shown in the work of our PhD student Dave Burke, who developed a significance-driven image processing method. He detects the significance gradient based on stats measures, such as std deviation (cf. inexact compute algorithm), and makes decision on whether and where to apply more exact computation.

Watch this great video from Dave:   and observe the effects of power-staggered computing!


Asynchronous drive from Analog

Run smarter – Live longer!

Breathe smarter – Live longer!

Tick smarter – Live longer!

I could continue listing these slogans for designing better electronics for the era of trillions of devices and peta, exa and zetta bits of information produced on our small planet.

Ultimately it is about how good we are in TIMING our ingestion and processing of information. TIMING has been and will always be a key design factor which will determine other factors such as performance, accuracy, energy efficiency of the system and even productivity of design processes.

As computing spreads into periphery, i.e. it goes into ordinary objects and fills the forms of these objects like water fills the shape of the cup, it would be only natural to think that computing at the peri or edge should be more determined by the nature of the environment rather than rules of computer design dominated the by-going era of compute-centrism. Computing for ages has been quite selfish and tyranic. Its agenda has been set by scaling the size of semiconductor devices and growing complexity of digital part. This scaling process had two important features. One was increasing speed, power consumption which has led to an ongoing growth in data server capacity. The other feature was the only way to manage complexity of the digital circuitry was to use clock in design to avoid potential racing conditions in circuits. As computing reaches the peri it does not need to become as complex and clocky as those compute-centric digital mosters. Computing has to be much more environment friendly. It has to be amenable to the conditions and needs of the environment – otherwise it simply won’t survive!

But the TIMING factor will remain! What will then drive this factor? It won’t certainly only be the scaling of devices and drive for higher throughput by means of clock – why? for example, because we will not be able to provide enough power for that high throughput – there isn’t enough lithium on the planet to make so many batteries. Nor we have enough engineers or technicians to maintain replacing those batteries. But on other hand we don’t need clock to run the digital parts of those peri devices because they will not be that complex. So, where will TIMING come from? One of natural ways of timing these devices is to extract TIMING directly from the environment, and to be precise from the ENERGY flows in the environment.

We have always used a power supply wire in our electronic circuits. Yes, but we have always used it as an always-ON servant, who had to be there to give us 5 Volts or 3 Volts, or more recently 1 Volt or even less (the so-called sub-threshold operation) like 0.4 Volts. That wire or signal has never been much of a signal carrying information value. Why? Well because such information value was always in other signals which would give us either data bits or clock ticks. Today is time to reconsider this traditional thinking and widen our horizon by looking at the power supply signal as a useful information source. Asynchronous or self-timed circuits are fundamentally much more cognizant of the energy flow. Such circuits naturally tune their tick boxes to the power levels and run/breath/tick smarter!

At Newcastle we have been placing asynchronous circuits at the edge with the environment into analog electronics. In particular, it has been power regulation circuits, A-to-D converters and various sensors (voltage, capacitance, …). This way allows significantly reduce the latencies and response times to important events in the analog, reduce sizes of passives (caps and inductors), but perhaps most importantly, thanks to our asynchronous design tools under Workcraft ( we have made asynchronous design much more productive. Industrial engineers in the analog domain are falling in love with our tools.

More information can be found here:


My keynote at Norwegian Nanoelectronics Network Workshop – 13 June 2018

I attended a high stimulating networking workshop in Norway – called Nano-Network

It was held in an idyllic place on the island called Tjome – south of Oslo.

Lots of excellent talks. Here is the programme:

and I gave my invited talk on “Bridging Asynchronous Circuits and Analog-Mixed Signal Design”. Here are the slides:

The whole event was highly stimulating, with exciting social programme. Challenging adventure towards Verdens Ende (World’s End) with lots of tricky questions and tests on the way. Our team did well … but we weren’t the winners 🙁